概要
生成AIの普及に伴い、データセンターではメモリ帯域と容量への要求が急速に高まっています。AIモデルの大規模化により、低消費電力と高効率を両立するメモリ技術の重要性が増しています。
本セッションでは、LPDDR6/5Xの特長と適用領域を整理し、HBMやGDDRとの役割分担やSOCAMMなど新たなフォームファクタを含めたアーキテクチャの方向性を解説します。さらに、CadenceのメモリIPソリューションを通じて、AIおよびデータセンター向け設計の指針を紹介します。
講演者情報
Cadence Design Systems,Inc.
Silicon Solutions Group
Group Director Memory IP
Frank Ferro
【職歴】
Frank Ferro is the group director of product marketing at Cadence Design Systems responsible for memory interface IP products. Frank joined Cadence after spending 25+ years at Rambus, AT&T, Lucent, and Agere Systems. Mr. Ferro holds an executive MBA from the Fuqua School of Business at Duke University, an M.S. in computer science, and a B.S. in electronic engineering technology from the New Jersey Institute of Technology.
Silicon Solutions Group
Group Director Memory IP
Frank Ferro
【職歴】
Frank Ferro is the group director of product marketing at Cadence Design Systems responsible for memory interface IP products. Frank joined Cadence after spending 25+ years at Rambus, AT&T, Lucent, and Agere Systems. Mr. Ferro holds an executive MBA from the Fuqua School of Business at Duke University, an M.S. in computer science, and a B.S. in electronic engineering technology from the New Jersey Institute of Technology.